With the continuous development of semiconductor technology, the technical node has gradually decreased; and the gate-last technology has been widely used in order to obtain desired threshold voltage, and improve the performance of the device. However, when the critical dimension of semiconductor device is further reduced, the structure of the conventional MOS field-effect transistor is unable to satisfy the performance needs of the semiconductor devices even with the use of the gate-last technology. Therefore, as multi-gate devices, fin field-effect transistors (FinFETs) have attracted extensive attentions.
FIG. 1 illustrates a three-dimensional view of an existing FinFET structure. As illustrated in FIG. 1, the FinFET structure includes a semiconductor substrate 10, and a plurality of protruding fins 20 formed on the semiconductor substrate 10. The plurality of fins 20 are usually formed by etching the semiconductor substrate 10. The FinFET structure also includes a dielectric layer 30 covering the surface of the semiconductor substrate 10 and portions of the side surfaces of the plurality of fins 20.
Further, the FinFET structure includes a gate structure (not labeled) crossing over the plurality of fins 20. The gate structure covers portions of the side and the top surfaces of the plurality of fins 20. The gate structure includes a gate dielectric layer 41 and a gate 42 formed on the gate dielectric layer 41. For a FinFET, the top portion and the side portions of the fins 20 contacting with the gate structure become the channel region. That is, the FinFET has a multiple gate structure. The multiple-gate structure is in favor of increasing drive current, and improving the performance of the semiconductor device. Further, the gate structure is able to cross over one or more fins simultaneously.
However, the performance of the existing FinFETs may need further improvements. The disclosed device structures and methods are directed to solve one or more problems set forth above and other problems.